New high-speed integrated circuit for Large Hedron Collider is fastest of its kind

WASHINGTON - A new high-speed integrated circuit that can reliably transmit data for the world’s largest physics experiment is the fastest of its kind, say experts.

The new “link-on-chip” - or LOC serializer circuit - was designed by physicists at Southern Methodist University in Dallas as a component for use in a key experiment of the Large Hadron Collider particle accelerator in Europe.

The miniscule SMU LOC serializer was designed for ATLAS, which is the largest particle detector at the Large Hadron Collider (LHC).

The LHC is a massive, high-tech tunnel about 100 meters underground.

SMU is a member of the ATLAS Experiment.

SMU’s new world’s-fastest LOC serializer is what the industry calls an integrated circuit made for a specific use, or “ASIC” for application-specific integrated circuit.

It was designed for the LHC’s high-radiation environment, as well as for high data bandwidth, low-power dissipation and extremely high reliability, said physicist Jingbo Ye.

An added feature of the SMU LOC serializer is that it can operate at cryogenic temperatures and has been tested down to liquid nitrogen temperatures of -346 degrees Fahrenheit.

It was designed to transmit data for the optical link readout system of the ATLAS Liquid Argon Calorimeter, an ATLAS sub-detector that measures the energies of electrons and photons generated at the centre of ATLAS where protons collide.

Because the electronic readout components are in the centre of the ATLAS detector, they are essentially inaccessible for routine maintenance, so reliability is paramount, said Ye.

Serializer transmits data shower from colliding protons With a data transmission rate of 5.8 billion-bits per second, the SMU LOC serializer represents the first milestone for the SMU-led team.

The team plans to develop an even faster ASIC serializer that transmits data at up to 10 billion-bits per second.

“SMU’s LOC serializer is the fastest in our field for the moment. CERN is developing another fast ASIC serializer that does not yet match our speed. SMU’s next goal is to increase both the data speed and the number of data lanes to produce an even faster LOC serializer. In the next few years, we hope to increase the total speed by a factor of 62 more than what is installed in ATLAS,” said Ye. (ANI)